temporarily out of stock
Networks on Chips,
GiovanniDe Micheli, Luca Benini, Luca Benini, Davide Bertozzi, (Contributor), Israel Cidon
The design of today's semiconductor chips for various applications, such as telecommunications, poses various challenges due to the complexity of these systems. These highly complex systems-on-chips demand new approaches to connect and manage the communication between on-chip processing and storage components and networks on chips (NoCs) provide a powerful solution.
This book is the first to provide a unified overview of NoC technology. It includes in-depth analysis of all the on-chip communication challenges, from physical wiring implementation up to software architecture, and a complete classification of their various Network-on-Chip approaches and solutions.
I. Introduction and Motivation Why on chip networks? State of the art Taxonomy Technology trends II. Architectures for NoCs Direct vs indirect networks Topologies Standard architectures and formal properties Ad hoc networks III. Physical network layer Wiring issues Physical routing Signalling Driver/receiver design Noise immunity Shielding IV. Data-link layer and encoding Medium access control Data encoding Error correcting codes: theory and practice Arbitration issues V. Switching and Routing in NoCs Packets, flits. Data forwarding schemes Routing: algorithms and routers QoS guarantees VI. Software for NoCs Programming paradigms: shared medium vs message passing Middleware issues. layering and software encapsulation Application layer issue and network-aware compilation VII. Tools for NoC Design Analysis and Synthesis of NoCs Present tools (Bones, Xpipes) and future outlook VIII. On-Chip multiprocessors High-performance monolithic multiprocessors Network issues IX. SoCs based on NoCs Examples of other design chips using NoCs